Integer Arithmetic

ALU & Branch Prediction Stress Testing

Overview

The Integer Arithmetic module implements two computationally intensive algorithms designed to maximize stress on your CPU's Arithmetic Logic Units (ALUs) and branch prediction mechanisms. These algorithms are specifically crafted to resist compiler optimizations and maintain maximum computational load.

Algorithms

3n+1 Problem (Collatz Conjecture)

An optimized implementation of the Collatz sequence that uses conditional moves and bit manipulation to stress integer units. The algorithm applies the rule: if n is even, divide by 2; if odd, multiply by 3 and add 1.

; Unrolled loop for maximum ALU stress lea rax, [rdi + 2*rdi + 1] ; 3n+1 shr rdi, 1 ; n/2 cmovc rdi, rax ; conditional move

Prime Factorization Engine

An extremely intensive prime factorization algorithm that combines trial division, Miller-Rabin primality testing, and modular arithmetic. Designed to maximize CPU utilization through expensive division operations and complex branching patterns.

; Trial division with verification div r13 ; expensive division test rdx, rdx ; check remainder call .miller_rabin_test ; primality test

Hardware Stress Targets

🔢

Arithmetic Logic Units (ALUs)

Intensive integer operations, divisions, multiplications, and bit manipulations saturate all available ALU execution units.

🎯

Branch Prediction

Complex conditional logic and unpredictable branching patterns stress the CPU's branch predictor and pipeline.

📊

Instruction Pipeline

Unrolled loops and conditional moves create instruction-level parallelism challenges for out-of-order execution.

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Register Allocation

Heavy register usage patterns stress the CPU's register renaming and allocation mechanisms.

Performance Characteristics

Computational Complexity

O(log n) 3n+1 Iterations
O(√n) Prime Factorization
10k+ Min Operations
100% ALU Utilization

Technical Implementation

Optimization Resistance Features:

  • Loop unrolling prevents compiler vectorization
  • Conditional moves eliminate predictable branches
  • Dynamic input scaling ensures non-trivial computation
  • Multiple verification passes prevent dead code elimination
  • Modular arithmetic with expensive verification loops

Assembly Optimizations:

  • LEA instructions for fast multiplication (3n+1)
  • Bit manipulation for even/odd detection
  • Register-heavy operations to stress allocation
  • Minimal memory access to focus on compute
⚠️ Performance Impact

This module will consume 100% CPU resources on all available cores. Extended execution may cause thermal throttling and system instability. Ensure adequate cooling before running intensive tests.

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